Connecting nets with copper, or, net aliases

Is it possible to have multiple nets on the schematic that are shorted together with copper on the layout?
This is kind of the opposite problem of the new shorted pads improvement. Basically, I’d like to create zero-ohm resistors using copper traces, still connecting two distinct nets, but without needing to populate a physical resistor on the board to achieve this.

Some examples of when this might be desirable:

  1. I have multiple ground nets: a noisy high-current ground net, and a quiet signal ground net for sensitive analog circuitry. They are at the same potential, but I want to differentiate them on the schematic with different names (eg. POWERGND, SIGNALGND, LOGICGND, etc) and link them at a single point on the PCB (star ground layout).
  • At the moment I can use zero-ohm resistors for this, but I think Horizon should allow me to connect them with copper if I so desire, rather than forcing me to populate a zero-ohm resistor to achieve this separation of nets.

  • However, aside from that connection point, if I create a POWERGND plane, I might want a SIGNALGND trace routed through that area to maintain clearance from the plane, just like other nets would.

  1. Setting aside star grounding, I may also want to give these nets different classes. For example, I might define the high-current class for POWERGND, and define a rule that high-current planes connect via solid connections and solid fill. Meanwhile, I might define SIGNALGND planes use thermal reliefs and hatched fill, because I don’t need the current-carrying capacity for those. And yet, I still want to short these nets together without needing to populate physical 0-ohm resistors on my PCB, because they’re both ground.

  2. Purely for organizational, design, or documentation purposes, I sometimes want to refer to a net by different names in different contexts.

  • For example, let’s say I have two batteries in series. Then I might have nets BAT1NEG, BAT1POS, BAT2NEG, BAT2POS. Of course, putting these in series, I would connect BAT2NEG to BAT1POS. I don’t want a super long net name like “BAT1POS BAT2NEG”. But let’s say I have some op-amp circuits for measuring the cell voltages. To make these circuits easy to read, I still want to feed BAT1POS and BAT1NEG to the inputs of one amp, and BAT2POS and BAT2NEG to the inputs of the other amp. But I’d rather not use zero-ohm resistors just to let me give alternate aliases to these nets.

  • Or, for design flexibility and modularity. For a random example, perhaps I am considering having a 3.3V rail and a 5V rail on my board. I have a bunch of components that perform best with 3.3V but accept 5V too, and other components that need 5V. During my prototype design, I put both power rails on the board and route the nets to each component accordingly. Later for production I want to cut costs and use a single 5V rail for everything, so I have to either use 0-ohm resistors or else merge the nets, destroying information about which components I had previously assigned to 3.3V. Later still, I want to make a high-spec board and add the 3.3V rail again. I now have to go back and split the nets apart again for hundreds of components.

People have been asking for this over and over, but I haven’t really an idea how it should be implemented. Some thoughts:

The netlist (block) stores which nets are shorted to each other. In the schematic, these are represented as net tie symbols connecting two junctions.

On the board, nets can be tied by drawing a corresponding net tie between two junctions (ends of tracks). They’ll look identical to tracks. DRC will make sure that a net tie only shorts the nets specified in the netlist.

Apart from that, the nets will stay separate. Would this work for you?

That sounds good to me. I agree that on the schematic, net tie symbols are the best way to do this. That way the connection is clear even on a printed page, just like if you’d used zero-ohm resistors, except even moreso.

(I’d previously even attempted to create my own “net tie schematic symbol” as a workaround – a part with two pads shorted together – only to discover that the part failed to pass design rule checks when it came to layout).

I think on the board, net tie tracks would be good enough for me, but a really ideal implementation would probably allow vias and planes to also behave as net ties.

Thank you for thinking about this!!

Two evenings of hacking and about 1300 lines of code later, we have net ties: GitHub - horizon-eda/horizon at net-ties

Let me know how they work for you.

The first step is tying together two nets in the schematic by selecting two junctions and invoking the “tie nets tool”.

In the board editor, use the “draw net tie” tool to put them onto the board. The net tie behaves as a track of its primary net in terms of clearance, width and so on.

The copper clearance checks ignore the clearance violation generated by the net tie and only that one, i.e. if you make the net tie to short so that the tracks at both ends come too close you’ll still get a clearance violation.

Net ties on the board can short any patch type, i.e you can draw the net tie in such a way that it directly shorts a pad to a plane.

Last but not least there’s a check that all net ties are placed on the board and connect the right nets.

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